Organic Substrate

Introduction

General Thermal Considerations

The resin typically has low thermal conductivity (0.2 - 0.3 W/(m.K)). This means that the metal present in the substrate - in the form of vias and layers - has a major impact on the thermal performance of the substrate.

The presence of metal layers increases the in-plane conductivity of the substrate, while leaving the through-plane conductivity relatively unaffected. The presence of thermal vias on the other hand, increases the through-plane conductivity, while hardly affecting the in-plane value.

Many organic substrates have both thermal vias and metal layers present. It is important to capture the effects of these accurately in a model.

Modeling Options

Dielectric

The dielectric (typically BT) is modeled as a single cuboid with conductivity as an input.

Metal Trace Layers

The metal layers (both signal and power/ground) are always modeled discretely in FloTHERM PACK. Each individual metal layer is represented as a cuboid with volume averaged conductivity (based on the fraction of the layer actually covered by the metal traces). The volume fraction is a user input and can range from 10 - 20% for signal traces to up to 100% for power/ ground planes. It is important to note that this value must be calculated by the user by first excluding any metal present in additional metallic elements such as the die-flag (for the top-most trace layer), and the backside spreader (for the bottom-most trace layer). Only the fraction that reflects the actual metal traces should be entered.

Figure 4-35. Actual Substrate with Metal Trace Layers

Figure 4-36. Representation of Actual Substrate with Metal Trace Layers

Thermal Vias

The thermal vias are modeled as one of the following three options:

This option represents the vias as individual cuboids. The conductivity of each such cuboid is a volume averaged quantity, representing the effect of the metal plating layer of the via as well as the central hollow region (filled with air).

Figure 4-37. Actual Via

Figure 4-38. Representation of Actual Vias

This option represents the vias as a single, volume averaged cuboid block. The conductivity of this cuboid is calculated by volume averaging.

The via block is placed below the metal layers in the hierarchy, so that it overrides the layers. This has found to give better agreement with experimental data for most cases. (The user, of course, is free to reverse the order as they see fit.)

Figure 4-39. Organic Substrate with Vias

This option represents the vias as a single cuboid block. The conductivity of this cuboid in each direction is different. The conductivity in the direction normal to the substrate plane is determined by volume averaging. However, the conductivity in the other two directions is set to that of the substrate dielectric.

Figure 4-40. Representation of Lumped Vias

Material Properties

BT Resin: 0.2 W/(m.K)

Copper: 390 W/(m.K)

Validation & References

  1. Sarang Shidore and Tien-Yu Tom Lee, A Comparative Study of the Performance of Compact Model Topologies and their Implementation in CFD for a Plastic Ball Grid Array Package, Proceedings of InterPACK ’99 Conference, June 1999, Hawai’i, U.S.A.
  1. Victor Chiriac and Tien-Yu Tom Lee, Thermal Strategy for Modeling Wire-bonded PBGA Packages, Proceedings of InterPACK ’99 Conference, June 1999, Hawai’i, U.S.A.
  1. V.H. Adams, K. Ramakrishna, T-Y. Tom Lee, J. V. Hause & M. Mahalingham, Design-Based Thermal Performance Evaluation of a GaAs MMIC Device in a Plastic Ball Grid Array Package, Proceedings of InterPACK ’99 Conference, June 1999, Hawai’i, U.S.A.
  1. K. Ramakrishna, J.R. Trent, Parametric Study of Thermal Performance of a Plastic Ball Grid Array, Single Package Technology for Automotive Applications, CAD/CAE and Thermal Management Issues in Electronic Systems, D. Agonafer et al. (editor), ASME Electrical and Electronic Packaging Division, pp 13-21, EEP-Vol 23 and HTD-Vol 356.
  1. Sarang Shidore, Gary Kromann & Steve Addison, Development of Optimized Component-Level Thermal Behavioral Models of a Plastic-Ball-Grid Array Interconnect Technology For Air Cooled Applications, Proceedings of InterPACK ’97 Conference, June 1997, Hawai’i, U.S.A.
  1. Pavel Valenta, Thermal Modeling of Ball Grid Arrays, 5th International FloTHERM User Conference, 1996, Paris, France.
  1. Thermal Modeling of a PBGA for Air-Cooled Applications, Electronic Packaging & Production, March 1998.